Cache Coherence Protocol Comparison
š Snoop-Based Coherence
Shared Bus (Broadcast)
Core 0
Core 1
Core N
L1$ + L2$
L1$ + L2$
L1$ + L2$
DRAM (Memory)
Latency
O(1) bus access
Traffic
O(N) broadcast
Scalability
ā¤ 8-16 cores
Storage
No directory
š Directory-Based Coherence
Interconnect (NoC/Mesh)
Core 0
L1$+L2$
Core 1
L1$+L2$
Core N
L1$+L2$
š Directory + LLC Slice
sharer vector | state | D-bit
DRAM
Latency
O(1) indirection
Traffic
O(k) pt-to-pt
Scalability
1000+ cores
Storage
O(NĀ²) worst-case