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Welcome to Zongwu's Science Hub ✨

Residence:

Shanghai
Age:

18

Architecture 95

System 18

Newest Publications

Bit-slice Architecture for DNN Acceleration with Slice-level Sparsity Enhancement and Exploitation

26/02/20
03:10

BitMoD_ Bit-serial Mixture-of-Datatype LLM Acceleration

26/02/20
03:10

Blenda_Dynamically-Reconfigurable_Stacked_DRAM

26/02/20
03:10

A Case for Speculative Address Translation with Rapid Validation for GPUs

26/02/20
03:10

A Scalable,_Efficient,_and_Robust_Dynamic_Memory_Management_Library_for_HLS-based_FPGAs

26/02/20
03:10

AccelES_ Accelerating Top-K SpMV for Embedding Similarity via Low-bit Pruning

26/02/20
03:10

ActiveN_ A Scalable and Flexibly-programmable Event-driven Neuromorphic Processor

26/02/20
03:10

AdapTiV_Sign-Similarity based Image-Adaptive Token Merging for Vision Transformer Acceleration

26/02/20
03:10

Anda_ Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format

26/02/20
03:10

Architecting Value Prediction around In-Order Execution

26/02/20
03:10

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