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Architecture
A Scalable,_Efficient,_and_Robust_Dynamic_Memory_Management_Library_for_HLS-based_FPGAs
  • 02/20
  • 11:04
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ActiveN_ A Scalable and Flexibly-programmable Event-driven Neuromorphic Processor
  • 02/20
  • 11:04
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Anda_ Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format
  • 02/20
  • 11:04
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AsyncDIMM_Achieving_Asynchronous_Execution_in_DIMM-Based_Near-Memory_Processing
  • 02/20
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Azul_An_Accelerator_for_Sparse_Iterative_Solvers_Leveraging_Distributed_On-Chip_Memory
  • 02/20
  • 11:04
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Bit-slice Architecture for DNN Acceleration with Slice-level Sparsity Enhancement and Exploitation
  • 02/20
  • 11:04
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Bridging the Gap Between LLMs and LNS with Dynamic Data Format and Architecture Codesign
  • 02/20
  • 11:04
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COMPASS_SRAM-Based_Computing-in-Memory_SNN_Accelerator_with_Adaptive_Spike_Speculation
  • 02/20
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Cambricon-C_ Efficient 4-bit Matrix Unit via Primitivization
  • 02/20
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Cambricon-LLM_ A Chiplet-Based Hybrid Architecture for On-Device Inference of 70B LLM
  • 02/20
  • 11:04
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