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Architecture
Chameleon_ Versatile and practical near-DRAM acceleration architecture for large memory systems
  • 02/26
  • 10:20
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AESPA_ Asynchronous Execution Scheme to Exploit Bank-Level Parallelism of Processing-in-Memory
  • 02/26
  • 10:17
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DRMap_A_Generic_DRAM_Data_Mapping_Policy_for_Energy-Efficient_Processing_of_Convolutional_Neural_Networks
  • 02/26
  • 10:14
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CORUSCANT_ Fast Efficient Processing-in-Racetrack Memories
  • 02/26
  • 10:13
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PipeLayer_A_Pipelined_ReRAM-Based_Accelerator_for_Deep_Learning
  • 02/26
  • 10:09
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pLUTo_ Enabling Massively Parallel Computation in DRAM via Lookup Tables
  • 02/24
  • 21:40
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A Scalable,_Efficient,_and_Robust_Dynamic_Memory_Management_Library_for_HLS-based_FPGAs
  • 02/20
  • 11:04
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ActiveN_ A Scalable and Flexibly-programmable Event-driven Neuromorphic Processor
  • 02/20
  • 11:04
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Anda_ Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format
  • 02/20
  • 11:04
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AsyncDIMM_Achieving_Asynchronous_Execution_in_DIMM-Based_Near-Memory_Processing
  • 02/20
  • 11:04
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